发明名称 RESISTIVE RANDOM ACCESS MEMORY STRUCTURE AND METHOD FOR OPERATING RESISTIVE RANDOM ACCESS MEMORY
摘要 A resistive random access memory (RRAM) structure including a first transistor, a second transistor and a RRAM cell string is provided. The first transistor and the second transistor are cascaded by electrically connecting a first terminal of the first transistor and the second transistor. The RRAM cell string includes a plurality of memory cells connected with each other and is electrically connected to a second terminal of the first transistor.
申请公布号 US2016148978(A1) 申请公布日期 2016.05.26
申请号 US201514601252 申请日期 2015.01.21
申请人 Powerchip Technology Corporation 发明人 Hsu Mao-Teng
分类号 H01L27/24;G11C13/00 主分类号 H01L27/24
代理机构 代理人
主权项 1. A resistive random access memory structure, comprising: a first transistor and a second transistor, wherein the first transistor and the second transistor are cascaded by electrically connecting a first terminal of the first transistor with the second transistor; and a resistive random access memory cell string, comprising a plurality of memory cells electrically connected to each other, and electrically connected to a second terminal of the first transistor.
地址 Hsinchu TW