发明名称 NOC TIMING POWER ESTIMATING DEVICE AND METHOD THEREOF
摘要 A NoC timing power estimating method includes: estimating a plurality of transmission timing of a plurality of transmission units of at least a packet, the transmission timing indicating respective time points at which the transmission units enter/leave a plurality of passing elements of the NoC; based on the transmission timing of the transmission units, estimating respective circuit states and respective power states of the passing elements of the NoC, the circuit state indicating an operation state of the passing element and the power state being related to the circuit state; and based on the power states of the passing elements of the NoC, estimating power consumption of the NoC.
申请公布号 US2016149780(A1) 申请公布日期 2016.05.26
申请号 US201414585864 申请日期 2014.12.30
申请人 INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE 发明人 HSU Ting-Shuo;LIOU Jing-Jia;SHEN Jih-Sheng;LU Juin-Ming
分类号 H04L12/26 主分类号 H04L12/26
代理机构 代理人
主权项 1. A network-on-chip (NoC) timing power estimating method, comprising: estimating a plurality of transmission timings of a plurality of transmission units of at least a packet, the transmission timings indicating respective time points at which the transmission units enter/leave a plurality of traversed elements of the NoC; estimating respective circuit states and respective power states of the traversed elements of the NoC according to the transmission timings of the transmission units, wherein the circuit state indicates an operation state of the traversed element, and the power state is related to the circuit state; and estimating power consumption of the NoC according to the power states of the traversed elements of the NoC.
地址 Hsinchu TW