发明名称 TEST DEVICE OF SEMICONDUCTOR INTEGRATED CIRCUIT, TEST SYSTEM, AND TEST METHOD
摘要 PROBLEM TO BE SOLVED: To control an external test auxiliary device in synchronization with a test signal without using a device test signal in a test device which tests a semiconductor integrated circuit using the external test auxiliary device.SOLUTION: A test device comprises: a clock signal generation circuit which generates a first clock signal; a sequence controller which divides the first clock signal to generate a second clock signal; a test circuit which generates a test signal in synchronization with the second clock signal; a parallel control circuit which generates a parallel control signal in synchronization with the second clock signal and supplies the signal to the external test auxiliary device; a serial I/F circuit which transmits or receives serial data between itself and the external test auxiliary device; a high-speed clock signal generation circuit which has a higher frequency than the frequency of the second clock signal, and generates a third clock signal synchronizing with the first clock signal and supplies the signal to the external test auxiliary device; and a tester controller.SELECTED DRAWING: Figure 1
申请公布号 JP2016095175(A) 申请公布日期 2016.05.26
申请号 JP20140230300 申请日期 2014.11.13
申请人 SEIKO EPSON CORP 发明人 IIDA KATSUYA
分类号 G01R31/28 主分类号 G01R31/28
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