发明名称 SEMICONDUCTOR DEVICE
摘要 One semiconductor device includes nine surface micro-bumps laid out in a 3×3 matrix on a semiconductor substrate, a transistor that contains first and second diffusion layers formed on the semiconductor substrate, and power-supply wiring laid out on the semiconductor substrate. The aforementioned first diffusion layer is connected to one of the surface micro-bumps, the second diffusion layer is connected to the power-supply wiring, and the transistor is laid out in the region between the surface micro-bumps located on one edge in an X direction and the surface micro-bumps located on the other edge in said X direction.
申请公布号 US2016148907(A1) 申请公布日期 2016.05.26
申请号 US201414900050 申请日期 2014.06.12
申请人 SEGAWA Machio;NAGAMINE Hisayuki;PS4 LUXCO S.A.R.L. 发明人 Segawa Machio;Nagamine Hisayuki
分类号 H01L25/065;H01L27/092;H01L23/00;H01L23/48;H01L23/528 主分类号 H01L25/065
代理机构 代理人
主权项 1. A semiconductor device comprising: a semiconductor substrate; first, second, and third bump electrodes which are formed on the semiconductor substrate and are disposed at a first pitch along a first direction; fourth, fifth, and sixth bump electrodes which are formed on the semiconductor substrate and are disposed at the first pitch along the first direction; seventh, eighth, and ninth bump electrodes which are formed on the semiconductor substrate and are disposed at the first pitch along the first direction; a first transistor comprising first and second diffusion layers which are formed on the semiconductor substrate; and a first power supply line disposed on the semiconductor substrate, wherein: the first, fourth and seventh bump electrodes are disposed along a second direction intersecting the first direction at a second pitch such that the first bump electrode is located between the fourth and seventh bump electrodes;the second, fifth and eighth bump electrodes are disposed along the second direction at the second pitch such that the second bump electrode is located between the fifth and eighth bump electrodes;the third, sixth and ninth bump electrodes are disposed at the second pitch along the second direction such that the third bump electrode is located between the sixth and ninth bump electrodes;the first diffusion layer is connected to the first bump electrode;the second diffusion layer is connected to the first power supply line; andthe first transistor is disposed in a region between the fourth and sixth bump electrodes and the seventh and ninth bump electrodes.
地址 Tokyo JP