FULLY DEPLETED REGION FOR REDUCED PARASITIC CAPACITANCE BETWEEN A POLY-SILICON LAYER AND A SUBSTRATE REGION

摘要

A fully depleted region may be used to reduce poly-to-substrate parasitic capacitance in an electronic device with poly-silicon layer. When the fully depleted region is located at least partially beneath the electronic device, an additional parasitic capacitance is formed between the fully depleted region and the substrate region. This additional parasitic capacitance is coupled in series with a first parasitic capacitance between a poly-silicon layer of the electronic device and the doped region. The series combination of the first parasitic capacitance and the additional parasitic capacitance results in an overall reduction of parasitic capacitance experience by an electronic device. The structure may include two doped regions on sides of the electronic device to form a fully depleted region based on lateral interaction of dopant in the doped regions and the substrate region.

主权项

1. An apparatus, comprising:
a substrate region having a first doping; a dielectric layer on the substrate region; a doped region in the substrate region, wherein the doped region has a second doping that is an opposite polarity dopant from the first doping of the substrate region; a depletion region in the substrate region formed by lateral interaction between the second doping of the doped region and the first doping of the substrate region; and an electronic device on the dielectric layer and at least partially over the depletion region such that a parasitic capacitance between the electronic device and the substrate region is reduced.