发明名称 |
PARSER ENGINE PROGRAMMING TOOL FOR PROGRAMMABLE NETWORK DEVICES |
摘要 |
A parser engine programming tool configured to receive an input file representing a directly connected cyclical graph or tree of decision points for parsing a range of incoming packet headers, automatically generate all possible paths within the graph and thereby the associated possible headers, and convert the determined paths/headers into a proper format for programming memory of a parser engine to parse the determined headers (represented by the paths). |
申请公布号 |
US2016139892(A1) |
申请公布日期 |
2016.05.19 |
申请号 |
US201514675667 |
申请日期 |
2015.03.31 |
申请人 |
XPLIANT, Inc. |
发明人 |
Atreya Kishore Badari;Pudiyapura Ajeer Salil;Suresh Ravindran |
分类号 |
G06F9/45;G06F9/44 |
主分类号 |
G06F9/45 |
代理机构 |
|
代理人 |
|
主权项 |
1. A processing network comprising:
a processing circuit having a programmable parser including one or more parsing engines that parse data packets received by the processing circuit; and a parser compiler stored on a non-transitory computer-readable memory and communicatively coupled with each of the parsing engines, wherein the parser compiler is configured to generate values based on a parser configuration file that when programmed into a memory associated with each of the parsing engines enables the parsing engines to identify each of a set of different combinations of packet headers represented by the parser configuration file. |
地址 |
San Jose CA US |