| 摘要 |
Provided is a substrate structure that suppresses signal degradation caused by the capacitance of inter-layer vias in a build-up substrate, etc. The present invention is a multi-layered substrate in which inter-layer vias are mutually offset in the vertical direction, wherein the multi-layered substrate is characterized by having an appropriate clearance around the vias for each layer in order to minimize the mismatch between the distance between the inter-layer vias and an electrical power layer near the vias, the height and diameter of the vias, and the wiring impedances of the layers generated by the capacitance of the vias relative to the capacitance of the vias as determined by the relative permittivity of the dielectric near the vias. |
