发明名称 |
FinFETs with Different Fin Height and EPI Height Setting |
摘要 |
An integrated circuit structure includes a first semiconductor strip, first isolation regions on opposite sides of the first semiconductor strip, and a first epitaxy strip overlapping the first semiconductor strip. A top portion of the first epitaxy strip is over a first top surface of the first isolation regions. The structure further includes a second semiconductor strip, wherein the first and the second semiconductor strips are formed of the same semiconductor material. Second isolation regions are on opposite sides of the second semiconductor strip. A second epitaxy strip overlaps the second semiconductor strip. A top portion of the second epitaxy strip is over a second top surface of the second isolation regions. The first epitaxy strip and the second epitaxy strip are formed of different semiconductor materials. A bottom surface of the first epitaxy strip is lower than a bottom surface of the second epitaxy strip. |
申请公布号 |
US2016141205(A1) |
申请公布日期 |
2016.05.19 |
申请号 |
US201615003909 |
申请日期 |
2016.01.22 |
申请人 |
Taiwan Semiconductor Manufacturing Company, Ltd. |
发明人 |
Chiang Hung-Li;Lai Wei-Jen;Yuan Feng;Lee Tsung-Lin;Yeh Chih Chieh |
分类号 |
H01L21/762;H01L21/306;H01L29/66;H01L21/28 |
主分类号 |
H01L21/762 |
代理机构 |
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代理人 |
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主权项 |
1. A method comprising:
forming a first recess between two portions of a first plurality of shallow trench isolation (STI) regions; performing a first epitaxy to grow a first epitaxy strip in the first recess, wherein the first epitaxy strip is over and contacting a first semiconductor strip portion of a semiconductor substrate; forming a second recess between additional two portions of a second plurality of STI regions; performing a second epitaxy to grow a second epitaxy strip in the second recess, wherein the first epitaxy strip is over and contacting a second semiconductor strip portion of the semiconductor substrate; and recessing the first plurality of STI regions and the second plurality of STI regions to form a second semiconductor fin and a second semiconductor fin, respectively, wherein the first plurality of STI regions is recessed to a first depth smaller than a height of the first epitaxy strip, and the second plurality of STI regions is recessed to a second depth greater than a height of the second epitaxy strip. |
地址 |
Hsin-Chu TW |