| 摘要 |
A method for controlling a memory includes causing a data de-skewer to operate in a writing mode, at the data de-skewer, receiving a first signal, and skewing the first data signal by a first compensation skew, causing the data de-skewer to operate in a reading mode, at the data de-skewer, receiving a second signal, and skewing the second signal by a second compensation skew, wherein the first signal is representative of a bit from a byte that is to be written to the memory, and wherein the second signal is representative of a bit from a byte that has been read from the memory. |
| 主权项 |
1. An apparatus for controlling a memory, said apparatus comprising: a memory controller, and an interface to data lines connecting said memory controller to said memory, wherein each of said data lines carries a signal that corresponds to a bit of a byte that is to be written to said memory, wherein said interface comprises, for each of said data lines, a transmitter to drive bits to be written into said memory onto a data line coupled to the transmitter, wherein said interface comprises, for each of said data lines, a receiver to detect bits that have been read from said memory from a data line coupled to the receiver, wherein said memory controller comprises, for each of said data lines, a data de-skewer used in a writing mode and a reading mode, wherein for each of said data lines, said data de-skewer is configured to receive a first data signal, wherein each of said data lines is associated with an inherent skew, wherein said data de-skewer applies a compensation skew to said first data signal to generate a second data signal, and wherein, in the writing mode said first second data signal is a signal that represents a bit that is to be written into said memory, and in the reading mode said second data signal is a signal that represents a bit that has been read from said memory. |
