发明名称 |
MEMORY DEVICE INCLUDING POWER-UP CONTROL CIRCUIT, AND MEMORY SYSTEM HAVING THE SAME |
摘要 |
A memory device may include a power-up control circuit and a first set of boost voltage generators. The power-up control circuit may be configured to consecutively activate a first set of power-up signals with a first delay time between each power-up signal of the first set of power-up signals in response to a rise of a power supply voltage and a reset signal having a first logic level at an initial stage of power-up. The first set of boost voltage generators may be configured to generate an internal boost voltage based on an external boost voltage and the first set of power-up signals. The first set of boost voltage generators may be configured to activate before the reset signal transitions from the first logic level to a second logic level opposite to the first logic level. |
申请公布号 |
US2016141015(A1) |
申请公布日期 |
2016.05.19 |
申请号 |
US201514837294 |
申请日期 |
2015.08.27 |
申请人 |
Samsung Electronics Co., Ltd. |
发明人 |
LEE Seung-Hun;CHOI Hyung-Chan;SHIN Won-Jae |
分类号 |
G11C11/4074;G11C11/408 |
主分类号 |
G11C11/4074 |
代理机构 |
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代理人 |
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主权项 |
1. A memory device comprising:
a power-up control circuit configured to consecutively activate a first set of power-up signals with a first delay time between each power-up signal of the first set of power-up signals in response to a rise of a power supply voltage and a reset signal having a first logic level at an initial stage of power-up; and a first set of boost voltage generators configured to generate an internal boost voltage based on an external boost voltage and the first set of power-up signals, wherein the first set of boost voltage generators are configured to activate before the reset signal transitions from the first logic level to a second logic level opposite to the first logic level. |
地址 |
Suwon-si KR |