MEMORY ARRAY HAVING DIVIDED APART BIT LINES AND PARTIALLY DIVIDED BIT LINE SELECTOR SWITCHES

摘要

A non-volatile data storage device comprises pairs of immediately adjacent and isolated-from-one-another local bit lines that are independently driven by respective and vertically oriented bit line selector devices. The isolation between the immediately adjacent and isolated-from-one-another local bit lines also isolates from one another respective memory cells of the non-volatile data storage device such that leakage currents cannot flow from memory cells connected to a first of the immediately adjacent and isolated-from-one-another local bit lines to memory cells connected to the second of the pair of immediately adjacent and isolated-from-one-another local bit lines. A method programming a desire one of the memory cells includes applying boosting voltages to word lines adjacent to the bit line of the desired memory cell while not applying boosting voltages to word lines adjacent to the other bit line of the pair.

主权项

1. A non-volatile data storage device comprising:
a substrate; a three dimensional arrangement of non-volatile storage elements (NVSE's) positioned above the substrate, where each non-volatile storage element has respective first and second terminals provided for electrical operating of the respective non-volatile storage element; a plurality of word lines connected to the non-volatile storage elements; a plurality of pairs of adjacent but isolated-from-one-another, vertically oriented bit lines extending vertically into the three dimensional arrangement of non-volatile storage elements, the bit lines of each pair connecting to corresponding non-volatile storage elements, the adjacent but isolated-from-one-another, vertically oriented bit lines of each pair having at least one of an insulative material and an air gap interposed between them; a three dimensional arrangement of vertically oriented, bit line selector devices, each of the bit line selector devices having a respective output terminal, a respective control terminal, and a respective input terminal, the bit line selector devices being positioned below the non-volatile storage elements and above the substrate, the output terminals of the bit line selector devices being respectively coupled to respective ones of the vertically oriented bit lines; a plurality of group select lines extending between and coupling to control terminals of respective groups of the bit line select devices; and a plurality of spaced apart global bit lines positioned below the bit line selector devices and above the substrate; wherein a bit line connection point of one of the vertically oriented bit lines to a corresponding non-volatile storage element in a given layer of the three dimensional arrangement of non-volatile storage elements is not a shared connection point that is also a bit line connection point to another non-volatile storage element in the same layer of the three dimensional arrangement of non-volatile storage elements.