| 发明名称 |
COMPILER ARCHITECTURE FOR PROGRAMMABLE APPLICATION SPECIFIC INTEGRATED CIRCUIT BASED NETWORK DEVICES |
| 摘要 |
A processing network including a plurality of lookup and decision engines (LDEs) each having one or more configuration registers and a plurality of on-chip routers forming a matrix for routing the data between the LDEs, wherein each of the on-chip routers is communicatively coupled with one or more of the LDEs. The processing network further including an LDE compiler stored on a memory and communicatively coupled with each of the LDEs, wherein the LDE compiler is configured to generate values based on input source code that when programmed into the configuration registers of the LDEs cause the LDEs to implement the functionality defined by the input source code. |
| 申请公布号 |
US2016139891(A1) |
申请公布日期 |
2016.05.19 |
| 申请号 |
US201514675710 |
申请日期 |
2015.03.31 |
| 申请人 |
XPLIANT, Inc |
发明人 |
Pudiyapura Ajeer Salil;Atreya Kishore Badari;Suresh Ravindran |
| 分类号 |
G06F9/45;G06F9/44 |
主分类号 |
G06F9/45 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A processing network comprising:
a plurality of lookup and decision engines (LDEs) on a programmable microchip, wherein each of the LDEs has one or more configuration registers; a plurality of on-chip routers forming a matrix on the microchip for routing the data between the LDEs, wherein each of the on-chip routers is communicatively coupled with one or more of the LDEs; and an LDE compiler stored on a non-transitory computer-readable memory and communicatively coupled with each of the LDEs, wherein the LDE compiler is configured to generate values based on input source code that when programmed into the configuration registers of the LDEs cause the LDEs to implement the functionality defined by the input source code. |
| 地址 |
San Jose CA US |
