DEVICE AND METHOD FOR DETECTING CONTROLLER SIGNAL ERRORS IN FLASH MEMORY

摘要

In accordance with the disclosure, there is provided a memory device configured to implement an error detection protocol. The memory device includes a memory array and a first input for receiving a control signal corresponding to a command cycle. The memory device also includes a second input for receiving an access control signal during a command cycle and for receiving an error detection signal during the command cycle, wherein the error detection signal includes information corresponding to the access control signal. The memory device further includes control logic configured to verify the correctness of the access control signal by a comparison with the error detection signal and perform an operation on the memory array during the command cycle when the correctness of the access control signal is verified.

主权项

1. A memory device configured to implement an error detection protocol, the memory device comprising:
a memory array; a first input for receiving a control signal corresponding to a command cycle; a second input for receiving an access control signal during the command cycle and for receiving an error detection signal during the command cycle, wherein the error detection signal includes information corresponding to the access control signal; and control logic configured to verify the correctness of the access control signal by a comparison with the error detection signal and perform an operation on the memory array during the command cycle when the correctness of the access control signal is verified.