| 发明名称 |
Deep trench isolation |
| 摘要 |
An integrated semiconductor device includes a substrate of a first conductivity type, a buried layer located over the substrate, an isolated region located over a first portion of the buried layer, and an isolation trench located around the isolated region. A punch-through structure is located around at least a portion of the isolation trench. The punch-through structure includes a second portion of the buried layer, a first region located over the second portion of the buried layer, the first region having a second conductivity type, and a second region located over the first region, the second region having the first conductivity type. |
| 申请公布号 |
US9343526(B2) |
申请公布日期 |
2016.05.17 |
| 申请号 |
US201313801514 |
申请日期 |
2013.03.13 |
| 申请人 |
FREESCALE SEMICONDUCTOR, INC. |
发明人 |
Cheng Xu;Blomberg Daniel J.;Zhang Zhihong;Zuo Jiang-Kai |
| 分类号 |
H01L29/72;H01L29/06;H01L27/108;H01L21/761;H01L21/8238;H01L21/762 |
主分类号 |
H01L29/72 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A method, comprising:
forming a buried layer over a substrate of a first conductivity type; forming a first isolation trench around an isolated region, the isolated region being disposed over a first portion of the buried layer; forming a second isolation trench around the first isolation trench; and forming a punch-through structure between at least a portion of the first isolation trench and a portion of the second isolation trench by:
forming a first region over a second portion of the buried layer, the first region having the first conductivity type, andforming a second region located over the first region, the second region having a second conductivity type. |
| 地址 |
Austin TX US |
