Nested rewind only and non rewind only transactions in a data processing system supporting transactional storage accesses

摘要

In a multiprocessor data processing system having a distributed shared memory system, first and second nested memory transactions are executed, where the first memory transaction is a rewind-only transaction (ROT) and the second memory transaction is a non-ROT memory transaction. The first memory transaction has a transaction body including the second memory transaction and an additional plurality of transactional memory access instructions. In response to execution of the transactional memory access instructions, memory accesses are performed to the distributed shared memory system. Conflicts between memory accesses not within the first memory transaction and at least a load footprint of any of the transactional memory access instructions preceding the second memory transaction are not tracked. However, conflicts between memory accesses not within the first memory transaction and store and load footprints of any of the transactional memory access instructions that follow initiation the second memory transaction are tracked.

主权项

1. A method, comprising:
in a multiprocessor data processing system having a shared memory system, executing a first memory transaction and a nested second memory transaction, wherein the first memory transaction has a transaction body including the second memory transaction and an additional plurality of transactional memory access instructions, and wherein the first memory transaction is a rewind-only transaction (ROT) and the second memory transaction is a non-ROT memory transaction; in response to execution of the plurality of transactional memory access instructions, performing one or more memory accesses to the shared memory system indicated by the one or more transactional memory access instructions; refraining from tracking conflicts between memory accesses not within the first memory transaction and at least a load footprint of any of the plurality of transactional memory access instructions preceding the second memory transaction; and tracking conflicts between memory accesses not within the first memory transaction and store and load footprints of any of the plurality of transactional memory access instructions that follow initiation of the second memory transaction.