发明名称 Copper post structure for wafer level chip scale package
摘要 In a method for forming a packaging structure, a metal pad is formed on a semiconductor substrate, and a first polymer insulating layer is formed over the semiconductor substrate. An opening passing through the first polymer insulating layer is formed to expose a portion of the metal pad. A copper-containing material is deposited in the opening and over the first polymer insulating layer, thereby forming a copper-containing layer having a first thickness and a first width over the first polymer insulating layer. A conductive bump having a second width is formed over the copper-containing layer, in which the second width is smaller than the first width. An exposed portion of the copper-containing layer is etched using the conductive bump as a mask until the exposed portion is reduced to a second thickness, thereby forming a monolithic copper-containing structure.
申请公布号 US9343415(B2) 申请公布日期 2016.05.17
申请号 US201514690570 申请日期 2015.04.20
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 Shih Chao-Wen;Chiang Yung-Ping;Hsieh Chen-Chih;Tsai Hao-Yi
分类号 H01L23/00;H01L21/78;H01L21/56 主分类号 H01L23/00
代理机构 Maschoff Brennan 代理人 Maschoff Brennan
主权项 1. A method, comprising: depositing a copper-containing material over the semiconductor substrate, thereby forming a copper-containing layer having a first thickness and a first width over the semiconductor substrate; forming a conductive bump having a second width over the copper-containing layer, wherein the second width is smaller than the first width; and etching an exposed portion of the copper-containing layer using the conductive bump as a mask until the exposed portion is reduced to a second thickness, thereby forming a monolithic copper-containing structure comprising a top portion and a bottom portion adjoining the top portion, the top portion having a third thickness which is equal to the first thickness minus the second thickness, the bottom portion having the second thickness.
地址 Hsinchu TW