Content searching chip based protocol conversion

摘要

A content searching chip and system based on a peripheral component interconnect (PCI) bus. The content searching chip includes a peripheral component interconnect interface module, a protocol conversion module, and a content storage module. The content storage module is connected to the protocol conversion module using an instruction bus and a data bus. The peripheral component interconnect interface module acquires a first processing layer data packet using the peripheral component interconnect bus; the protocol conversion module acquires the first processing layer data packet from a parallel bus provided between the protocol conversion module and the peripheral component interconnect interface module, parses and converts the first processing layer data packet to an operation request and data; the content storage module stores content, performs an operation according to the operation request, and returns operation response data; the instruction bus transmits the operation request, and the data bus transmits the data.

主权项

1. A content searching chip comprising:
a first peripheral component interconnect (PCI) interface; a protocol conversion circuit coupled to the first PCI interface using a parallel bus; and a content storage circuit, wherein the content storage circuit coupled to the protocol conversion circuit using an instruction bus and a data bus, wherein the first PCI interface circuit is configured to acquire a first processing layer data packet from a peripheral device using a PCI bus, wherein the protocol conversion circuit is configured to:
acquire the first processing layer data packet from the first PCI interface circuit using the parallel bus; andparse and convert the first processing layer data packet to an operation request and data, wherein the operation request and the data can be identified by the content storage circuit, wherein the content storage circuit is configured to store content and return operation response data according to the operation request, wherein the instruction bus is configured to transmit the operation request, wherein the data bus is configured to transmit the data, wherein the operation request comprises one of a content search request, an entry read request, an entry write request, a register read request, a register write request, or an entry delete request, and wherein the protocol conversion circuit is configured to:
generate the content search request when detecting that, in the packet header of the first processing layer data packet, the Fmt field is 00 and the Type field is 00010;generate the entry read request when detecting that, in the packet header of the first processing layer data packet, the Fmt field is 00 or 01 and the Type field is 00000;generate the entry write request when detecting that, in the packet header of the first processing layer data packet, the Fmt field is 10 or 11 and the Type field is 00001;generate the register read request when detecting that, in the packet header of the first processing layer data packet, the Fmt field is 00 and the Type field is 00100;generate the register write request when detecting that, in the packet header of the first processing layer data packet, the Fmt field is 10 and the Type field is 00100; andgenerate the entry delete request when detecting that, in the packet header of the first processing layer data packet, the Fmt field is 10 and the Type field is 00101.