发明名称 Selectively coupling a PCI host bridge to multiple PCI communication paths
摘要 Instead of disabling PCI communication between system resources in a host computing device and I/O devices when a PCI Host Bridge (PHB) is reset, the host computing device may include a PCI communication path for maintaining communication between the system resources and the I/O devices. In one embodiment, the redundant PCI communication path includes a second PHB that is maintained in a standby state. The host may monitor the errors generated by a plurality of master PHBs and select a master PHB that satisfies an error threshold. The second PHB (i.e., a servant PHB) and the selected master PHB are synchronized, and the second PHB is coupled to the PCI communication path between the master PHB and a PCI switch. The master PHB can then be reset while the second PHB maintains PCI communication between the host and the I/O devices.
申请公布号 US9342422(B2) 申请公布日期 2016.05.17
申请号 US201314074009 申请日期 2013.11.07
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 Arroyo Jesse P.;Guttahalli Krishna Anjan Kumar
分类号 G06F11/00;G06F11/20;G06F11/16;G06F11/07;G06F12/06;G06F13/00;G06F11/14 主分类号 G06F11/00
代理机构 Patterson + Sheridan, LLP 代理人 Patterson + Sheridan, LLP
主权项 1. A computing system, comprising: a plurality of master peripheral component interconnect (PCI) host bridges, each master PCI host bridge (PHB) is coupled to a respective PCI switch via a respective PCI communication path for facilitating PCI communication between the computing system and I/O devices; a servant PHB selectively coupled to each of the PCI communication paths via selection logic; and supervisory logic configured to: upon determining that one of the plurality of master PHBs satisfies an error threshold, assign the servant PHB to backup the one master PHB;upon assigning the servant PHB to backup the one master PHB, synchronize the servant PHB with the one master PHB;couple, using the selection logic, the servant PHB to the respective PCI communication path of the one master PHB; andreset the one master PHB, wherein PCI communication between the computing system and at least one of the I/O devices flows through the servant PHB while the one master PHB is reset.
地址 Armonk NY US