发明名称 Electronic circuit for fitting a virtual address range to a physical memory containing faulty address
摘要 A memory having variable size blocks of failed memory addresses is connected to a TCAM storing data values of ranges of addresses in the memory. The ranges of addresses correspond to virtual addresses that, in combination with an offset, point away from failed memory addresses. A reduction circuit connected to the TCAM produces an output for each programmed range of addresses based on a virtual address. A priority encoder, connected to the reduction circuit, selects a first range from the reduction circuit and passes the first range to a random-access memory (RAM). Responsive to the virtual address bring an address in one of the ranges of addresses, the priority encoder passes the first range containing the virtual address to the RAM, which passes a corresponding offset value to the Adder based on the first range. The Adder calculates a physical memory address directing the virtual address to a functional memory location.
申请公布号 US9343185(B2) 申请公布日期 2016.05.17
申请号 US201314037487 申请日期 2013.09.26
申请人 International Business Machines Corporation 发明人 Barth, Jr. John E.;Chellappa Srivatsan;Lewis Dean L.
分类号 G06F12/00;G11C29/00;G06F9/445;G06F9/32;G06F12/08;G06F11/10;G06F12/12;G06F12/06;G06F13/22;G06F13/38;G06F12/10;G06F12/04;G11C15/00;G11C8/06 主分类号 G06F12/00
代理机构 Gibb & Riley, LLC 代理人 Gibb & Riley, LLC ;Meyers, Esq. Steven J.
主权项 1. An integrated circuit structure, comprising: a memory under repair having variable size blocks of failed memory addresses; a Ternary Content Addressable Memory (TCAM) comprising cells storing data values comprising ranges of addresses, said ranges of addresses corresponding to virtual addresses that, in combination with an offset value, point away from failed memory addresses in said memory under repair; a reduction circuit operatively connected to said TCAM, said reduction circuit producing a single output for each programmed range of said ranges of said addresses, based on a virtual address input to said TCAM; a priority encoder operatively connected to said reduction circuit, said priority encoder selecting a first programmed range from said reduction circuit; a random-access memory (RAM) operatively connected to said priority encoder, said RAM comprising cells storing data values comprising said offset value for each range of said ranges of said addresses; and an adder having two inputs, a first input being operatively connected to said RAM and a second input being operatively connected to a virtual address line, responsive to a virtual address being an address in one of said ranges of said addresses, said priority encoder passing said first programmed range containing said virtual address to said RAM, said RAM passing an offset value to said adder, said offset value corresponding to said first programmed range from said priority encoder, and said adder calculating a physical memory address directing said virtual address to a functional memory location in said memory under repair.
地址 Armonk NY US