发明名称 Group III nitride semiconductor light-emitting device and method for producing the same
摘要 The present invention provides a Group III nitride semiconductor light-emitting device exhibiting high light efficiency achieved by relaxing a piezoelectric field generated in a light-emitting layer without deteriorating the crystal quality of the light-emitting layer, and a method for producing the same. The light-emitting device has a light-emitting layer in which layer units are repeatedly deposited. Each layer unit comprises an AlGaN layer, an n-type InGaN layer, an InGaN layer, a GaN layer, and an AlGaN layer which are deposited in this order on the n-side superlattice layer. The n-type InGaN layer is doped with Si at a Si concentration of 1×1017/cm3 to 3×1018/cm3.
申请公布号 US9343619(B2) 申请公布日期 2016.05.17
申请号 US201414170238 申请日期 2014.01.31
申请人 Toyoda Gosei Co., Ltd. 发明人 Okuno Koji
分类号 H01L33/06;H01L33/32 主分类号 H01L33/06
代理机构 McGinn IP Law Group, PLLC 代理人 McGinn IP Law Group, PLLC
主权项 1. A Group III nitride semiconductor light-emitting device, comprising: a light-emitting layer having a layer unit; an n-type semiconductor layer; and a p-type semiconductor layer; wherein: the layer unit comprises at least a well layer in which electrons and holes are recombined and a non-doped barrier layer;the well layer has a first semiconductor layer, a second semiconductor layer disposed at the n-type semiconductor layer side of the well layer and a third semiconductor layer disposed between the first semiconductor layer and the second semiconductor layer;the first semiconductor layer consists of a non-doped InGaN;the second semiconductor layer consists of a Si-doped n-type InGaN;the third semiconductor layer consists of a non-doped InGaN;the second semiconductor layer is directly contacted with the non-doped barrier layer;the third semiconductor layer is directly contacted with the second semiconductor layer; andthe first semiconductor layer is directly contacted with the third semiconductor layer, and wherein the third semiconductor layer includes an In composition ratio that gradually increases toward the first semiconductor layer, and the In composition ratio of the third semiconductor layer is equal to or less than an In composition ratio of the first semiconductor layer.
地址 Kiyosu-shi, Aichi-ken JP