Silicon germanium and germanium multigate and nanowire structures for logic and multilevel memory applications

摘要

A method to provide a transistor or memory cell structure. The method comprises: providing a substrate including a lower Si substrate and an insulating layer on the substrate; providing a first projection extending above the insulating layer, the first projection including an Si material and a Si1−xGex material; and exposing the first projection to preferential oxidation to yield a second projection including a center region comprising Ge/Si1−yGey and a covering region comprising SiO2 and enclosing the center region.

主权项

1. A method to form a microelectronic structure, comprising:
providing a substrate including a lower Si substrate and an insulating layer on the substrate; forming a projection on the substrate projecting above the insulating layer comprising a plurality of interleaved Si1−xGex and Si layers; and oxidizing the projection to form a plurality of nanowires and an insulation covering, wherein the insulation covering is a single structure surrounding each of the plurality of nanowires.