发明名称 |
Multi-core processor, controlling method thereof and computer system with such processor |
摘要 |
A multi-core processor includes M cores. If the multi-core processor is operated under a non-multiprocessing support operating system, only a single core is configured as a central processing unit and N cores are configured as co-processors, wherein M and N are positive integers, and N is smaller than M. |
申请公布号 |
US9342477(B2) |
申请公布日期 |
2016.05.17 |
申请号 |
US201313861491 |
申请日期 |
2013.04.12 |
申请人 |
RDC SEMICONDUCTOR CO., LTD. |
发明人 |
Yap Chang-Cheng;Shih Ming-Chi |
分类号 |
G06F13/12;G06F15/00;G06F15/76;G06F15/177;G06F9/50 |
主分类号 |
G06F13/12 |
代理机构 |
WPAT, P.C. |
代理人 |
WPAT, P.C. ;King Justin |
主权项 |
1. A computer system, comprising:
a first multi-core processor with a first core and a second core; a peripheral component; a memory; and a memory controller connected with the memory, the first multi-core processor, and the peripheral component, wherein the memory is accessible to the first multi-core processor and the peripheral component; wherein the computer system is configured to have said first core as a first central processing unit and configured to have said second core as a first digital signal processor when said first multi-core processor is operated under a non-multiprocessing support operation system, and running said non-multiprocessing support operating system; and wherein the computer system is configured to have said first core as said first central processing unit and configured to have said second core as a second central processing unit when said first multi-core processor is operated under a multiprocessing support operation system, and running said multiprocessing support operating system. |
地址 |
Hsinchu TW |