发明名称 System and method for synchronizing processor instruction execution
摘要 A system and method for controlling processor instruction execution. In one example, a method for synchronizing a number of instructions performed by processors includes instructing a first processor to iteratively execute instructions via a first set of iterations until a predetermined time period has elapsed. A number of instructions executed in each iteration of the first set of iterations is less than a number of instructions executed in a prior iteration of the first set of iterations. The method also includes instructing a second processor to iteratively execute instructions via a second set of iterations until the predetermined time period has elapsed. A number of instructions executed in each iteration of the second set of iterations is less than a number of instructions executed in a prior iteration of the second set of iterations. The method includes determining whether additional instructions are to be executed.
申请公布号 US9342358(B2) 申请公布日期 2016.05.17
申请号 US201213620047 申请日期 2012.09.14
申请人 General Electric Company 发明人 Smith, II William David;Ahmed Safayet Nizam Uddin;Diekema Jon Marc
分类号 G06F7/38;G06F9/00;G06F9/44;G06F9/48;G06F11/16;G06F11/18;G06F11/20 主分类号 G06F7/38
代理机构 代理人 Darling John P.
主权项 1. A method for synchronizing a number of instructions performed by a plurality of processors, comprising: instructing a first processor to iteratively execute instructions via a first plurality of iterations until a predetermined time period has elapsed, wherein a number of instructions executed in each iteration of the first plurality of iterations is less than a number of instructions executed in a prior iteration of the first plurality of iterations; instructing a second processor synchronized with the first processor to iteratively execute instructions via a second plurality of iterations until the predetermined time period has elapsed, wherein a number of instructions executed in each iteration of the second plurality of iterations is less than a number of instructions executed in a prior iteration of the second plurality of iterations; determining a first total number of instructions executed by the first processor during the predetermined time period; determining a second total number of instructions executed by the second processor during the predetermined time period; instructing the second processor to execute a first calculated number of instructions if the second total number of instructions is less than the first total number of instructions; and instructing the first processor to execute a second calculated number of instructions if the first total number of instructions is less than the second total number of instructions.
地址 Niskayuna NY US