发明名称 SIGNAL GENERATION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a signal generation circuit which allows for input of a ternary signal to a monovalent trivalent drive digital amplifier of unbalanced input.SOLUTION: A signal generation circuit 1 outputs a signal of logical value 1, when the logical value of a data signal is 1 and the logical value of a clock signal is 0. The signal generation circuit 1 outputs a signal of logical value -1, when the logical value of a data signal is 0 and the logical value of a clock signal is 0. The signal generation circuit 1 outputs a signal of logical value 0, when the logical value of a data signal is 0 or 1 and the logical value of a clock signal is 1.SELECTED DRAWING: Figure 1
申请公布号 JP2016082339(A) 申请公布日期 2016.05.16
申请号 JP20140210344 申请日期 2014.10.15
申请人 ONKYO CORP 发明人 KAWAGUCHI TAKESHI;NAKANISHI YOSHINORI
分类号 H03K19/20;H03F3/217 主分类号 H03K19/20
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