| 摘要 |
PROBLEM TO BE SOLVED: To facilitate debugging of coverage, and to enable increase in verification efficiency.SOLUTION: A design verification support device comprises an information control unit that displays waveform information 100 on a logic simulation result of a logic circuit description in which a coverage extraction description indicative of presence or absence of occurrence of a prescribed event of a verification object circuit is added, a signal name of the waveform information 100 and a signal value thereof on a display device, extract a cover point name 101 indicative of the presence or absence of the prescribed event of the object circuit, an obtainable value 102 by the cover point and non-obtainable value 103 from the waveform information 100, and display cover group waveform information generated by associating a time and the cover point with the obtainable value and the non-obtainable value at the same time axis as with the waveform information 100 on the display device.SELECTED DRAWING: Figure 1A |
