发明名称 |
LINK LAYER SIGNAL SYNCHRONIZATION |
摘要 |
Embodiments of the present disclosure are directed toward signal synchronization in a link layer interconnect fabric. In one instance, an apparatus with logic for signal synchronization may include a clock synchronization logic to compare a core clock of the apparatus having a core clock frequency against a transmission clock of the apparatus having a first frequency or a reception clock of the apparatus having a second frequency, and, based on results of the comparison, generate a synchronized link transfer transmission clock or a synchronized link transfer reception clock respectively. Other embodiments may be described and/or claimed. |
申请公布号 |
US2016132072(A1) |
申请公布日期 |
2016.05.12 |
申请号 |
US201414537618 |
申请日期 |
2014.11.10 |
申请人 |
Intel Corporation |
发明人 |
Birrittella Mark S. |
分类号 |
G06F1/12 |
主分类号 |
G06F1/12 |
代理机构 |
|
代理人 |
|
主权项 |
1. An apparatus, comprising:
a clock synchronization logic, to:
compare a core clock of the apparatus having a core clock frequency against a transmission clock of the apparatus having a first frequency or a reception clock of the apparatus having a second frequency; andbased on results of the comparison, generate a synchronized link transfer transmission clock or a synchronized link transfer reception clock respectively. |
地址 |
Santa Clara CA US |