发明名称 Methods, Structures, and Designs for Self-Aligning Local Interconnects Used in Integrated Circuits
摘要 An integrated circuit includes a gate electrode level region that includes a plurality of linear-shaped conductive structures. Each of the plurality of linear-shaped conductive structures is defined to extend lengthwise in a first direction. Some of the plurality of linear-shaped conductive structures form one or more gate electrodes of corresponding transistor devices. A local interconnect conductive structure is formed between two of the plurality of linear-shaped conductive structures so as to extend in the first direction along the two of the plurality of linear-shaped conductive structures.
申请公布号 US2016133626(A1) 申请公布日期 2016.05.12
申请号 US201614995483 申请日期 2016.01.14
申请人 Tela Innovations, Inc. 发明人 Smayling Michael C.;Becker Scott T.
分类号 H01L27/092;H01L21/285;H01L21/8238;H01L21/768;H01L27/02;H01L23/528 主分类号 H01L27/092
代理机构 代理人
主权项 1. An integrated circuit, comprising: a first gate electrode level conductive structure configured to include a substantially linear-shaped portion that extends in a first direction and that has a lengthwise centerline oriented in the first direction, the substantially linear-shaped portion of the first gate electrode level conductive structure forming both a gate electrode of a first transistor of a first transistor type and a gate electrode of a first transistor of a second transistor type, the first transistor of the first transistor type including a first diffusion region of a first diffusion type and a second diffusion region of the first diffusion type, the first transistor of the second transistor type including a first diffusion region of a second diffusion type and a second diffusion region of the second diffusion type; a second gate electrode level conductive structure configured to include a substantially linear-shaped portion that extends in the first direction and that has a lengthwise centerline oriented in the first direction, the second gate electrode level conductive structure positioned next to the first gate electrode level conductive structure such that the first diffusion region of the first diffusion type is located between the first gate electrode level conductive structure and the second gate electrode level conductive structure; a third gate electrode level conductive structure configured to include a substantially linear-shaped portion that extends in the first direction and that has a lengthwise centerline oriented in the first direction, the third gate electrode level conductive structure positioned next to the first gate electrode level conductive structure such that the first diffusion region of the second diffusion type is located between the first gate electrode level conductive structure and the third gate electrode level conductive structure, the lengthwise centerline of the third gate electrode level conductive structure substantially aligned with the lengthwise centerline of the second gate electrode level conductive structure, the third gate electrode level conductive structure separated from the second gate electrode level conductive structure by a gap having an extent measured in the first direction between the third gate electrode level conductive structure and the second gate electrode level conductive structure; and a local interconnect conductive structure including a first portion and a second portion, the first portion of the local interconnect conductive structure configured to physically contact both the first diffusion region of the first diffusion type and the first diffusion region of the second diffusion type, the second portion of the local interconnect conductive structure configured to extend away from the first portion of the local interconnect conductive structure and through the gap that separates the third gate electrode level conductive from the second gate electrode level conductive structure.
地址 Los Gatos CA US