MULTILAYERED SEMICONDUCTOR DEVICE

摘要

A semiconductor device includes a first semiconductor chip located over a substrate; and a second semiconductor chip located over the first semiconductor chip, wherein the first semiconductor chip includes a first internal power supply generation circuit that generates a first internal power supply voltage supplied to a first internal circuit; a first penetration electrode formed from an upper surface of the first semiconductor chip to an underside of the first semiconductor chip and electrically connected to the first internal power supply generation circuit; a first reference voltage generation circuit that generates a first reference voltage; and a second penetration electrode formed from the upper surface of the first semiconductor chip to the underside of the first semiconductor chip and electrically connected to the first reference voltage generation circuit.

主权项

1. A semiconductor device comprising:
a substrate; a first semiconductor chip located over the substrate; and a second semiconductor chip located over the first semiconductor chip, wherein the first semiconductor chip includes: a first internal power supply generation circuit that generates a first internal power supply voltage supplied to a first internal circuit; a first penetration electrode formed from an upper surface of the first semiconductor chip to an underside of the first semiconductor chip and electrically connected to the first internal power supply generation circuit; a first reference voltage generation circuit that generates a first reference voltage; and a second penetration electrode formed from the upper surface of the first semiconductor chip to the underside of the first semiconductor chip and electrically connected to the first reference voltage generation circuit, wherein the second semiconductor chip includes: a second internal power supply generation circuit that generates a second internal power supply voltage supplied to a second internal circuit; a third penetration electrode formed from an upper surface of the second semiconductor chip to an underside of the second semiconductor chip and electrically connected to the second internal power supply generation circuit; a second reference voltage generation circuit that generates a second reference voltage; and a fourth penetration electrode formed from the upper surface of the second semiconductor chip to the underside of the second semiconductor chip and electrically connected to the second reference voltage generation circuit, wherein the first and third penetration electrodes are electrically connected to each other, and wherein the second and fourth penetration electrodes are electrically connected to each other.