| 摘要 |
In an example, a control device (104) includes a data path (322), a clock path (324), a multiplexing circuit (315), and a calibration unit (302). The data path comprises a data delay unit (310) coupled to a data input of a sampling circuit (319). The clock path comprises a clock delay unit (312) coupled to a clock input of the sampling circuit. The multiplexing circuit selectively couples a reference clock or a data bus to an input of the data delay unit, and selectively couples the reference clock or a source clock to an input of the clock delay unit. The calibration unit is coupled to a data output of the sampling circuit. The calibration unit is operable to adjust delay values of the data delay unit and the clock delay unit based on the data output of the sampling circuit to establish and maintain a relative delay between the data path and the clock path. |
