| 发明名称 |
SHIFT REGISTER CIRCUIT AND MEMORY DEVICE INCLUDING THE SAME |
| 摘要 |
A shift register circuit may include a first latch capable of latching an input signal in synchronization with a first clock, a first flip-flop capable of latching the output signal of the first latch in synchronization with a second dock having the same skew as the first clock, a second latch capable of latching the output signal of the first flip-flop in synchronization with a third clock having a different skew from the second clock, and a second flip-flop capable of latching the output signal of the second latch circuit in synchronization with a fourth clock having the same skew as the third clock. |
| 申请公布号 |
US2016133336(A1) |
申请公布日期 |
2016.05.12 |
| 申请号 |
US201514678581 |
申请日期 |
2015.04.03 |
| 申请人 |
SK hynix Inc. |
发明人 |
LIM Soo-Bin |
| 分类号 |
G11C19/00;G11C8/04 |
主分类号 |
G11C19/00 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A shift register circuit, comprising:
a first latch capable of latching an input signal in synchronization with a first dock; a first flip-flop capable of latching an output signal of the first latch in synchronization with a second clock having the same skew as the first clock; a second latch capable of latching an output signal of the first flip-flop in synchronization with a third clock having a different skew from the second clock; and a second flip-flop capable of latching an output signal of the second latch circuit in synchronization with a fourth clock having the same skew as the third clock. |
| 地址 |
Gyeonggi-do KR |
