发明名称 |
MULTI-LAYER TRANSMISSION LINE STRUCTURE FOR MISALIGNMENT RELIEF |
摘要 |
A circuit includes a dielectric layer and a stacked inductor. A first metal line is disposed on a first side of the dielectric layer. A second metal line is disposed on a second side of the dielectric layer and inductively coupled with the first metal line through a portion of the dielectric layer. The first metal line has a first width between respective edges of the first metal line. The second metal line has a second width between respective edges of the second metal line. The second width of the second metal line is greater than the first width of the first metal line. The first metal line is vertically aligned with the second metal line. The respective edges of the second metal line are located outwardly of the respective edges of the first metal line. |
申请公布号 |
US2016133566(A1) |
申请公布日期 |
2016.05.12 |
申请号 |
US201514930532 |
申请日期 |
2015.11.02 |
申请人 |
Morfis Semiconductor, Inc. |
发明人 |
Li Haitao |
分类号 |
H01L23/522;H01L23/66;H01L23/528 |
主分类号 |
H01L23/522 |
代理机构 |
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代理人 |
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主权项 |
1. A circuit, comprising:
a dielectric layer; and a stacked inductor, including:
a first metal line having a first width between respective edges of the first metal line, the first metal line disposed on a first side of the dielectric layer; anda second metal line having a second width between respective edges of the second metal line, the second width greater than the first width, the second metal line disposed on a second side of the dielectric layer and inductively coupled with the first metal line through a portion of the dielectric layer,wherein the first metal line is vertically aligned with the second metal line, and wherein the respective edges of the second metal line are located outwardly of the respective edges of the first metal line. |
地址 |
Irvine CA US |