发明名称 DIGITAL-TO-PHASE CONVERTER
摘要 Systems and methods for converting digital signals into clock phases are disclosed. An example digital-to-phase converter circuit receives a complementary in-phase and quadrature clock signals and produces four clock outputs at a phase controlled by a digital phase control input. The digital-to-phase converter uses first and second pre-driver modules to buffer the -phase and quadrature clock signals and produce corresponding buffered clock signals having controlled slew rates. Mixer modules produce the clock outputs by forming weighted combinations of the buffered clock signals. The weighting is determined based on the phase control input. The controlled slew rates of the buffered clock signals allow digital mixer module to provide accurate phase control. The digital-to-phase converter may also include an output buffer that compensates for nonlinearities in the relationship between the phases of the clock outputs and the phase control input.
申请公布号 US2016134266(A1) 申请公布日期 2016.05.12
申请号 US201414535744 申请日期 2014.11.07
申请人 QUALCOMM Incorporated 发明人 Cohen Hanan
分类号 H03K5/135;H03L7/081 主分类号 H03K5/135
代理机构 代理人
主权项 1. A digital-to-phase converter circuit for producing a clock output having a digitally controlled phase, the circuit comprising: a first pre-driver module configured to receive complementary in-phase clock signals and produce a first pair of complementary buffered clock signals having controlled slew rates; a second pre-driver module configured to receive complementary quadrature clock signals and produce a second pair of complementary buffered clock signals having controlled slew rates; and a mixer module configured to produce the clock output by forming a weighted combination of the buffered clock signals based on a phase control input.
地址 San Diego CA US