LOW-NOISE ARRANGEMENT FOR VERY-LARGE-SCALE INTEGRATION DIFFERENTIAL INPUT/OUTPUT STRUCTURES

摘要

Embodiments of the invention provide low-noise arrangements for very-large-scale integration (VLSI) differential input/output (I/O) structures (I/O pins, solder bumps, vias, etc.). Novel geometries are described for arranging differential pairs of I/O structures in perpendicular or near-perpendicular “quads.” The geometries effectively place one differential pair on or near the perpendicular bisector of its adjacent differential pair, such that field cancellation and differential reception can substantially eliminate noise without the need for added spacing or shields. By exploiting these effects, embodiments can suppress noise, independent of I/O structure spacing, and arbitrarily small spacings are permitted. Such arrangements can be extended into running chains, and even further into arrays of parallel chains. The parallel chains can be separated by supply structures (e.g., power supply bumps, or the like), and such supply structures can supply power to the I/O circuits of the IC, while also shielding adjacent chains from each other.

主权项

1. An integrated circuit comprising:
a two-dimensional arrangement of input/output (I/O) structures, including:
first and second I/O structures that are adjacent to each other and are electrically coupled with the integrated circuit so as to jointly carry a first differential signal; andthird and fourth I/O structures that are adjacent to each other and are electrically coupled with the integrated circuit so as to jointly carry a second differential signal,the third and fourth I/O structures being adjacent to and equidistant from the second I/O structure.