发明名称 SEMICONDUCTOR JUNCTION FORMATION
摘要 A semiconductor structure, such as a FinFET, etc., includes a bi-portioned junction. The bi-portioned junction includes a doped outer portion and a doped inner portion. The dopant concentration of the outer portion is less than the dopant concentration of the inner portion. An electrical connection is formed by diffusion of the dopants within outer portion into a channel region and diffusion of the dopants within the outer portion into the inner region. A low contact resistance is achieved by a contact electrically contacting the relatively higher doped inner portion while device shorting is limited by the relatively lower doped outer portion.
申请公布号 US2016133727(A1) 申请公布日期 2016.05.12
申请号 US201414537832 申请日期 2014.11.10
申请人 GLOBALFOUNDRIES Inc. 发明人 Hashemi Pouya;Mochizuki Shogo;Reznicek Alexander;Schepis Dominic J.
分类号 H01L29/66;H01L29/417;H01L29/08;H01L29/78;H01L29/06 主分类号 H01L29/66
代理机构 代理人
主权项 1. A semiconductor device fabrication process comprising: forming a fin upon a semiconductor substrate and forming a gate stack upon the semiconductor substrate and upon and orthogonal to the fin; forming a channel region under the gate stack by recessing the fin and semiconductor substrate exterior to the gate stack; forming an inner junction portion upon the recessed semiconductor substrate, and; forming an outer junction portion upon the recessed semiconductor substrate that electrically connects the channel region and the inner junction portion.
地址 Grand Cayman KY