发明名称 キースキャン回路及びデータ処理装置
摘要 PROBLEM TO BE SOLVED: To suppress power consumption and to speedily and precisely determine an operation key corresponding to key operation, while making load due to software processing during key scan operation dispensable.SOLUTION: A key scan circuit comprises: a key matrix 17d; a register part 17b for storing a scan frequency which determines a state of key on and a scan frequency which determines a state of key off; and a key controller part 17a which consecutively performs key-scan of the key matrix 17d by using a plurality of frequencies as one pair by using a greater one of stored respective determined frequencies of the key on and the key off, determines the key on concerning a key in which the key on is detected by the stored key on scan frequencies during the key-scans in a pair, and determines the key off concerning a key in which the key off is detected by the stored key off scan frequencies concerning the key in which the key on has been determined.
申请公布号 JP5915692(B2) 申请公布日期 2016.05.11
申请号 JP20140089111 申请日期 2014.04.23
申请人 カシオ計算機株式会社 发明人 鳥山 康治
分类号 H03M11/20;G06F3/023 主分类号 H03M11/20
代理机构 代理人
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