发明名称 調停回路、制御方法、および制御プログラム
摘要 PROBLEM TO BE SOLVED: To enable an arbitration circuit to arbitrate access to shared resources from a multi-core processor with an optimum access ratio.SOLUTION: A CPU #0 detects task switching from an application B to an application D in a CPU #1, and acquires application priorities and application access counts allocated to the respective CPUs from an application information group 121. The CPU #0 determines an access ratio of an application A having a highest priority among the allocated applications to the application D and an access ratio of the application A to an application C on the basis of the priorities and the access counts of the respective applications. The priority of the application A is 90 and the access count thereof is 90. The priority of the application D is 30 and the access count thereof is 90. The CPU #0 determines a ratio of the priority of the application A to that of the application D as the access ratio since comparison of the access count of the application A with that of the application D indicates that the application D is equal to the application A in the access count.
申请公布号 JP5915706(B2) 申请公布日期 2016.05.11
申请号 JP20140174625 申请日期 2014.08.28
申请人 富士通株式会社 发明人 栗原 康志;山下 浩一郎;宮▲崎▼ 清志;池田 仁
分类号 G06F9/50;G06F12/00 主分类号 G06F9/50
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