发明名称 Program/erase method for P-channel charge trapping memory device
摘要 A method of operating a memory device is disclosed, wherein the memory device includes an n-type substrate (202) and a plurality of memory cells formed thereon, each memory cell corresponding to a word line (218), a first bit line (204), and second bit line (206), and including a first bit portion and a second bit portion each for storing one bit of information. The method includes erasing a selected memory cell by applying a first negative bias to the word line of the selected memory cell and applying a ground bias to the first and second bit lines, and programming the first bit portion of the selected memory cell by applying a first positive bias to the word line of the selected memory cell, applying a second negative bias to the first bit line of the selected memory cell, and applying a ground bias to the second bit line of the selected memory cell.
申请公布号 EP1770712(B1) 申请公布日期 2016.05.11
申请号 EP20070001071 申请日期 2004.08.10
申请人 MACRONIX INTERNATIONAL CO., LTD. 发明人 HANG-TING, LUE
分类号 G11C16/04;H01L21/8247;H01L27/115;H01L29/788;H01L29/792 主分类号 G11C16/04
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