发明名称 複数のインターポーザを伴うスタックドダイアセンブリ
摘要 A stacked die assembly for an IC includes a first interposer (500A); a second interposer (500B); a first integrated circuit die (300, 1110), a second integrated circuit die (303), and a plurality of components (713). The first integrated circuit die (300, 1110) is interconnected to the first interposer (500A) and the second interposer (500B), and the second integrated circuit die (303) is interconnected to the second interposer (500B). The plurality of components (713) interconnect the first integrated circuit die (300, 1110) to the first interposer (500A) and the second interposer (500B). Signals are routed between the first interposer and the second interposer via the first integrated circuit die and the plurality of components. In some exemplary assemblies, the plurality of components that interconnect the first integrated circuit die to the first interposer and the second interposer are located outside an interconnect restricted area (710) of the first interposer and the second interposer, and signals are routed between the first interposer and the second interposer via the first integrated circuit die and the plurality of components, avoiding the interconnect restricted area of the first interposer and the second interposer. Methods of forming these assemblies are also described.
申请公布号 JP5916898(B2) 申请公布日期 2016.05.11
申请号 JP20140556545 申请日期 2012.12.03
申请人 ザイリンクス インコーポレイテッドXILINX INCORPORATED 发明人 ウー,エフレム・シィ;バニジャマリ,バハレー;チャワレ,ラグフナンダン
分类号 H01L25/04;H01L25/18 主分类号 H01L25/04
代理机构 代理人
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