3-D MEMORY WITH ERROR CHECKING AND CORRECTION

摘要

A 3D memory according to an embodiment of the present invention includes memory layers which comprise a memory cell array and a spare cell array, respectively and are stacked in a vertical direction, and a master layer which controls the memory layers. The master layer stores a check bit used for the error check and correct (ECC) of an upper memory layer stacked on the uppermost layer of the memory layers in the spare cell array of one or more lower memory layers stacked under the upper memory layer, and performing the ECC of the upper memory by using the stored check bit. The spare cell array comprises one or more spare memory cells for replacing a memory cell having a defect. So, the ECC performance of the 3D memory can be improved.