发明名称 Arrangement of semiconductor dies
摘要 A semiconductor die arrangement comprising a first die (102) including at least one semiconductor device; a second die (103) including at least one semiconductor device; a lead frame (120) associated with the first die (102) and comprising one or more lead fingers (121,122,123), wherein the second die (103) is mounted on one of the lead fingers and electrically connected to a further die by a bond wire (125).
申请公布号 EP3018710(A1) 申请公布日期 2016.05.11
申请号 EP20140192543 申请日期 2014.11.10
申请人 NXP B.V. 发明人 NAVAJA, DEOREX DAVID AVILA
分类号 H01L23/49;H01L23/495 主分类号 H01L23/49
代理机构 代理人
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