发明名称 Microprocessor including a display interface in the microprocessor
摘要 A processing system is disclosed. The processing system comprises a first integrated circuit. The first integrated circuit includes a processor core, a display interface and memory controller coupled to a first bus interface. The display interface is adapted to display graphical information generated by a graphics engine. A graphics engine is not on the first integrated circuit. The processing system includes a second bus interface for allowing communication with the first integrated circuit via the first bus interface. The second bus interface is adapted to allow for communication to a graphics engine.
申请公布号 US9336752(B1) 申请公布日期 2016.05.10
申请号 US200711963579 申请日期 2007.12.21
申请人 Oracle America, Inc. 发明人 Glaskowsky Peter N.
分类号 G06F13/14;G09G5/36;G06T1/20;G09G5/393;G09G5/395;G09G5/39 主分类号 G06F13/14
代理机构 Osha Liang LLP 代理人 Osha Liang LLP
主权项 1. A processing system comprising: a single processor comprising a first integrated circuit, wherein the first integrated circuit comprises a processor core, a display interface, and a memory controller coupled to a first bus interface, and wherein the display interface is adapted to display graphical information generated by a graphics engine that is not on the first integrated circuit; and a second bus interface for allowing communication with the first integrated circuit via the first bus interface, wherein the second bus interface is adapted to allow for communications with the graphics engine, wherein the processor core of the first integrated circuit performs at least some of the functions of the graphics engine when the graphics engine is disabled.
地址 Redwood Shores CA US