SiC devices with high blocking voltage terminated by a negative bevel

摘要

A negative bevel edge termination for a Silicon Carbide (SiC) semiconductor device is disclosed. In one embodiment, the negative bevel edge termination includes multiple steps that approximate a smooth negative bevel edge termination at a desired slope. More specifically, in one embodiment, the negative bevel edge termination includes at least five steps, at least ten steps, or at least 15 steps. The desired slope is, in one embodiment, less than or equal to fifteen degrees. In one embodiment, the negative bevel edge termination results in a blocking voltage for the semiconductor device of at least 10 kilovolts (kV) or at least 12 kV. The semiconductor device is preferably, but not necessarily, a thyristor such as a power thyristor, a Bipolar Junction Transistor (BJT), an Insulated Gate Bipolar Transistor (IGBT), a U-channel Metal-Oxide-Semiconductor Field Effect Transistor (UMOSFET), or a PIN diode.

主权项

1. A Silicon Carbide (SiC) semiconductor device comprising:
a multi-step negative bevel edge termination that approximates a smooth slope; a semiconductor layer of a first conductivity type; wherein a surface of the semiconductor layer in an edge region of the semiconductor layer is doped with ions of a second conductivity type to thereby provide a neutral region in the semiconductor layer having a desired negative bevel characteristic.