发明名称 Systems and methods for hardware-assisted type checking
摘要 Devices and methods of providing hardware support for dynamic type checking are provided. In some embodiments, a processor includes a type check register and support for one or more checked load instructions. In some embodiments, normal load instructions are replaced by a compiler with the checked load instructions. In some embodiments, to perform a checked load, an error handler instruction location is stored in the type check register, and a type tag operand is compared to a type tag stored in the loaded memory location. If the comparison succeeds, execution may proceed normally. If the comparison fails, execution may be transferred to the error handler instruction. In some embodiments, type prediction is performed to determine whether a checked load instruction is likely to fail.
申请公布号 US9336125(B2) 申请公布日期 2016.05.10
申请号 US201213594607 申请日期 2012.08.24
申请人 University of Washington through its Center for Commercialization 发明人 Eggers Susan J.;Ceze Luis;Fortuna Emily;Anderson Owen
分类号 G06F11/00;G06F11/36;G06F11/07;G06F9/45 主分类号 G06F11/00
代理机构 Christensen O'Connor Johnson Kindness PLLC 代理人 Christensen O'Connor Johnson Kindness PLLC
主权项 1. A computing device configured to execute dynamically typed programming languages, the computing device comprising: circuitry configured to execute a checked load instruction; and a type check register configured to store a location of an error handler; wherein the checked load instruction is configured to accept at least a source memory location operand, a destination memory location operand, and a type tag operand.
地址 Seattle WA US