发明名称 Method and system for asynchronous successive approximation analog-to-digital convertor (ADC) architecture
摘要 Methods and systems are provided for controlling signal processing outputs. In signal processing circuitry, searching through a plurality of quantization levels for a quantization level that matches an analog input, and when the search fails within a particular amount of time, adjusting at least a portion of an output of the signal processing circuitry. The adjusting comprises setting the at least portion of the output to a predefined value. Setting the output, or portions thereof, may comprise selecting between output of a normal processing path and output of a code generation path configured for handling search failures. Timing information may be generated for use in controlling generating of the output of the signal processing circuitry. The timing information may be used in measuring per-cycle operation time during the search through the plurality of quantization levels.
申请公布号 US9337859(B2) 申请公布日期 2016.05.10
申请号 US201514812327 申请日期 2015.07.29
申请人 MAXLINEAR, INC. 发明人 Chen Xuefeng;Chan Kok Lim;Fogleman Eric;Ye Sheng
分类号 H03M1/10;H03M1/38;H03M1/06;H03M1/12;H03M1/46 主分类号 H03M1/10
代理机构 McAndrews, Held & Malloy, Ltd. 代理人 McAndrews, Held & Malloy, Ltd.
主权项 1. A method, comprising: in signal processing circuitry: searching through a plurality of quantization levels for a quantization level that matches an analog input; andwhen said search for said matching quantization level fails within a particular amount of time, adjusting at least a portion of an output of said signal processing circuitry.
地址 Carlsbad CA US