Memory array

摘要

A memory array includes a first memory cell and a second memory cell aligned along a column direction. Each of the first memory cell and the second memory cell includes a pair of cross-coupled inverters, a first switch on a first side, along the column direction, of the pair of cross-coupled inverters, a second switch aligned with the first switch along the column direction, on a second side of the pair of cross-coupled inverters opposing to the first side, a third switch on the first side of the pair of cross-coupled inverters, and a fourth switch aligned with the third switch along the column direction, on the second side of the pair of cross-coupled inverters. The memory array also includes a first data line, a first complementary data line, a second data line and a second complementary data line.

主权项

1. A memory array, comprising:
a first memory cell and a second memory cell aligned along a column direction, each of the first memory cell and the second memory cell comprising:
a pair of cross-coupled inverters having a first output terminal and a second output terminal;a first switch on a first side, along the column direction, of the pair of cross-coupled inverters and electrically coupled to either the first output terminal or the second output terminal;a second switch aligned with the first switch along the column direction, on a second side of the pair of cross-coupled inverters opposing to the first side, and electrically coupled to either the first output terminal or the second output terminal;a third switch on the first side of the pair of cross-coupled inverters and electrically coupled to either the first output terminal or the second output terminal; anda fourth switch aligned with the third switch along the column direction, on the second side of the pair of cross-coupled inverters, and electrically coupled to either the first output terminal or the second output terminal; a first data line along the column direction and over the first switch and the second switch; a first complementary data line along the column direction and over the third switch and the fourth switch; a second data line along the column direction and over the first switch and the second switch; and a second complementary data line along the column direction and over the third switch and the fourth switch.