Memory device, electronic component, and electronic device

摘要

Provided is a memory device having a plurality of memory cells and a refresh circuit. Each of the memory cells is configured to retain multiple data as a potential of a node connected to a gate of a first transistor, one of a source and a drain of a second transistor, and one of electrodes of a capacitor. The refresh circuit is configured to refresh the memory cells. That is, the refresh circuit is configured to determine an interval between refresh operations, estimate a change of the potential of the node due to the leakage of the charge, and provide a refresh potential to the memory cells, where the refresh potential is a sum of the potential read from the node and the potential lost due to the charge leakage.

主权项

1. A memory device comprising:
a memory cell comprising:
a first transistor comprising a gate, a source, and a drain;a second transistor comprising a gate, a source, and a drain; anda capacitor comprising a first electrode and a second electrode; and a refresh circuit, wherein the memory cell is configured to retain data as a potential at a node which is connected to the gate of the first transistor, one of the source and the drain of the second transistor, and one of the first electrode and the second electrode of the capacitor, wherein the refresh circuit is configured to perform refresh operation by supplying the memory cell with a refresh potential, and wherein the refresh potential is a sum of the potential read from the node and a potential corresponding to a change of the potential of the node due to leakage of charge from the node.