Semiconductor memory device and driving method thereof

摘要

A semiconductor memory device in which capacitance of a capacitor is lower and integration degree is higher. A plurality of memory blocks is connected to one bit line BL_m. A memory block MB_n_m includes a sub bit line SBL_n_m, a write switch, and a plurality of memory cells. A sub bit line SBL_n+1_m adjacent to the sub bit line SBL_n_m is connected to an amplifier circuit AMP_n/n+1_m including two inverters and two selection switches. A circuit configuration of the amplifier circuit can be changed with the selection switches. The amplifier circuit is connected to the bit line BL_m through a read switch. Because of a sufficiently low capacitance of the sub bit line SBL_n_m, potential change due to electric charges of the capacitor in each memory cell can be amplified by the amplifier circuit AMP_n/n+1_m without an error, and the amplified data can be output to the bit line BL_m.

主权项

1. A semiconductor device comprising:
a bit line; a first sub bit line; a second sub bit line; a first transistor; a second transistor; an amplifier circuit; and a first memory block and a second memory block each including two or more memory cells, wherein the first memory block is electrically connected to the first sub bit line and the second memory block is electrically connected to the second sub bit line, wherein the first sub bit line is electrically connected to a first input terminal of the amplifier circuit, wherein a first output terminal of the amplifier circuit is electrically connected to the bit line through the first transistor, wherein the second sub bit line electrically connected to the second memory block is electrically connected to a second input terminal of the amplifier circuit, and wherein a second output terminal of the amplifier circuit is electrically connected to the bit line through the second transistor.