| 发明名称 | Layout architecture for performance improvement | ||
| 摘要 | An integrated circuit is provided. The integrated circuit includes a first contact disposed over a first source/drain region, a second contact disposed over a second source/drain region, a polysilicon disposed over a gate, the polysilicon interposed between the first contact and the second contact, a first polysilicon contact bridging the polysilicon and the first contact within an active region, and an output structure electrically coupled to the first polysilicon contact. | ||
| 申请公布号 | US9337290(B2) | 申请公布日期 | 2016.05.10 |
| 申请号 | US201213537804 | 申请日期 | 2012.06.29 |
| 申请人 | Taiwan Semiconductor Manufacturing Company, Ltd. | 发明人 | Lu Lee-Chung;Tien Li-Chun;Zhuang Hui-Zhong |
| 分类号 | H01L29/423;H01L29/417;H01L27/32;H01L27/02;H01L21/768 | 主分类号 | H01L29/423 |
| 代理机构 | Slater Matsil, LLP | 代理人 | Slater Matsil, LLP |
| 主权项 | 1. An integrated circuit, comprising: a first contact disposed over a first source/drain region; a second contact disposed over a second source/drain region; a polysilicon disposed over a gate, the polysilicon interposed between the first contact and the second contact; a first polysilicon contact extending from the polysilicon to the first contact within an active region; and an output structure electrically coupled to the first polysilicon contact. | ||
| 地址 | Hsin-Chu TW | ||