| 摘要 |
Read disturb due to hot electron injection is reduced in a 3D memory device by controlling the magnitude and timing of word line and select gate ramp down voltages at the end of a sensing operation. In an example read operation, the magnitude of a selected word line voltage is increased to be equal to pass voltages of unselected word lines, and the selected and unselected word line are ramped down at the same time, to avoid creating a channel gradient. In an example verify operation, the above procedure can be followed when the selected word line is at a source-side or middle range among all word lines. When the selected word line is at a drain-side among all word lines, a source-side select gate can be ramped down before the selected word line and a drain-side select gate can be ramped down after the selected word line. |
| 主权项 |
1. A method for sensing in a memory device, comprising:
applying a demarcation voltage to a selected word line among a plurality of word lines in the memory device, wherein:
the plurality of word lines are connected to memory cells in a plurality of NAND strings,the plurality of NAND strings comprise a selected NAND string and an unselected NAND string,the selected NAND string comprises a selected memory cell connected to the selected word line between a drain-side select gate and a source-side select gate,the unselected NAND string comprises an unselected memory cell connected to the selected word line between a drain-side select gate and a source-side select gate,a selected source-side select gate line, is connected to the source-side select gate of the selected NAND string,an unselected source-side select gate line, is connected to the source-side select gate of the unselected NAND string,a selected drain-side select gate line, is connected to the drain-side select gate of the selected NAND string, andan unselected drain-side select gate line, is connected to the drain-side select gate of the unselected NAND string; while the demarcation voltage is applied to the selected word line, a read pass voltage which is higher than the demarcation voltage is applied to unselected word lines among the plurality of word lines, a respective turn-on voltage is applied to the selected source-side select gate line, and a respective turn-on voltage is applied to the selected drain-side select gate line, determining whether the selected memory cell is in a conductive state; increasing a voltage of the selected word line from the demarcation voltage to an elevated level, the elevated level is within a +/−20% range of the read pass voltage; concurrently ramping down word line voltages, the concurrently ramping down of the word line voltages comprises ramping down a voltage of the selected word line from the elevated level to a respective steady state voltage and ramping down a voltage of the unselected word lines from the read pass voltage to a respective steady state voltage, while a respective turn-off voltage is applied to the selected source-side select gate line; ramping down a voltage of the selected source-side select gate line from the respective turn-on voltage to a respective turn-off voltage after the determining whether the selected memory cell is in the conductive state and before the concurrently ramping down of the word line voltages; and ramping down a voltage of the selected drain-side select gate line from the respective turn-on voltage to a respective turn-off voltage. |
