发明名称 Semiconductor device for suppressing inductance
摘要 According to one embodiment, a semiconductor device includes first to fourth circuit substrates. Each of the first to fourth circuit substrates includes a switching device. The first circuit substrate includes a first terminal unit and a second terminal unit set to a potential lower than a potential of the first terminal unit. The third circuit substrate includes a fifth terminal unit and a sixth terminal unit set to a potential lower than a potential of the fifth terminal unit. The first circuit substrate overlaps the third circuit substrate. The second circuit substrate overlaps the fourth circuit substrate. A direction from the first terminal unit toward the second terminal unit is reversely oriented with respect to a direction from the fifth terminal unit toward the sixth terminal unit.
申请公布号 US9337174(B2) 申请公布日期 2016.05.10
申请号 US201414478264 申请日期 2014.09.05
申请人 Kabushiki Kaisha Toshiba 发明人 Hasegawa Kohei;Yamamoto Takashi
分类号 H01L25/00;H01L25/07;H01L23/64;H01L25/18 主分类号 H01L25/00
代理机构 Oblon, McClelland, Maier & Neustadt, L.L.P. 代理人 Oblon, McClelland, Maier & Neustadt, L.L.P.
主权项 1. A semiconductor device, comprising: a first circuit substrate including a first substrate having a first surface,a first switching element provided at the first surface,a first terminal unit provided in the first substrate and electrically connected to the first switching element, anda second terminal unit provided in the first substrate, electrically connected to the first switching element, and set to a potential lower than a potential of the first terminal unit; a second circuit substrate including a second substrate having a second surface,a second switching element provided at the second surface,a third terminal unit provided in the second substrate and electrically connected to the second switching element, anda fourth terminal unit provided in the second substrate, electrically connected to the second switching element, and set to a potential lower than a potential of the third terminal unit; a third circuit substrate including a third substrate having a third surface,a third switching element provided at the third surface,a fifth terminal unit provided in the third substrate and electrically connected to the third switching element, anda sixth terminal unit provided in the third substrate, electrically connected to the third switching element, and set to a potential lower than a potential of the fifth terminal unit; and a fourth circuit substrate including a fourth substrate having a fourth surface,a fourth switching element provided at the fourth surface,a seventh terminal unit provided in the fourth substrate and electrically connected to the fourth switching element, andan eighth terminal unit provided in the fourth substrate, electrically connected to the fourth switching element, and set to a potential lower than a potential of the seventh terminal unit, the second terminal unit and the third terminal unit being electrically connected, the sixth terminal unit and the seventh terminal unit being electrically connected, the third surface overlapping at least a portion of the first surface when projected onto the first surface, the fourth surface overlapping at least a portion of the second surface when projected onto the second surface, a component of a direction from the first terminal unit toward the second terminal unit being reversely oriented with respect to a component of a direction from the fifth terminal unit toward the sixth terminal unit when projected onto a plane including a first direction from the first circuit substrate toward the second circuit substrate and a second direction from the first circuit substrate toward the third circuit substrate, a component of a direction from the third terminal unit toward the fourth terminal unit being reversely oriented with respect to a component of a direction from the seventh terminal unit toward the eighth terminal unit when projected onto the plane.
地址 Minato-ku JP